Innosilicon INNOLINK™ IP 提供领先的小芯片Chiplet IP解决方案，允许大量低延迟数据在较小的芯片之间无缝传输，就好像它们都在同一条总线上一样。小芯片被定义为构成大型芯片的独立功能块，在这个异构集成新时代实现性能和效率提升的关键。基于此，Innosilicon 推出了 INNOLINK™ Chiplet解决方案，为数据中心、网络、5G、HPC 和 AI 应用程序提供裸片到裸片  (D2D)、芯片到芯片 (C2C)、板到板 (B2B)、以及封装到封装（P2P）高效能的连接。

与当今可用的其他接口相比，Innosilicon INNOLINK™ IP 旨在以更低的功率和更小的面积预算最大限度地提高裸片/芯片/板/封装之间的带宽。通过提供三种互连选项 (A/B/C)，INNOLINK™  IP 可以通过易于使用的系统界面根据客户的不同要求进行定制。它的架构具有高度可编程性和灵活性，最高可实现高达 3.4Tbps/mm²  带宽效率密度，同时保持信号完整性和低延迟。在您的系统中采用 INNOLINK™ IP 肯定会使高性能计算 ASIC/FPGA 受益，例如 CPU、GPU、AI 加速器等等。

Innosilicon INNOLINK™ IP provides a leading-edge chiplet solution allowing massive  amounts of low-latency data to pass seamlessly between smaller chips as if they  were all on the same bus. Chiplets, defined as independent functional blocks  making up a large chip, are pivotal in this new era of heterogeneous  integration to achieve performance and efficiency gains. Based on this,  Innosilicon launches the INNOLINK™ chiplet solution as  a critical enabler of the power- and cost-efficient die-to-die (D2D),  chip-to-chip (C2C), board-to-board (B2B) and package-to-package (P2P)  connectivity for data center, networking, 5G, HPC and AI applications.

Innosilicon INNOLINK™ IP is designed to maximize bandwidth between dies / chips / boards  / packages, compared to other interfaces available today, at lower power and  smaller area budgets. By offering three interconnect options (A/B/C), INNOLINK™ IP can be tailored to customer’s different  requirements with an easy-to-use system interface. It is architected for high  programmability and flexibility, Maximum bandwidth efficiency up to 3.4Tbps/mm² while maintaining signal integrity and low latency. Adopting  the INNOLINK™ IP in your system will definitely benefit  high performance computing ASICs/FPGAs, such as CPU, GPU, AI accelerator, and  much more.